ANDROID DIAGNOSTICS / NO POWER
No Power / Dead
No Power / Dead
diagnostic engine
Convert bench observations into a staged diagnosis: current draw, rails, USB enumeration, storage behavior and platform-specific boot progression.
BOOT ENERGY FLOW
VBATInput
PMICAON rails
SoCPON / clocks
RAMInit
UFSBoot media
Animated sequence illustrates probable boot progression, not a universal timing specification.
01 — ENTER BENCH EVIDENCE
Measure first, then interpret
Use actual board readings. Empty fields are treated as unknown rather than assumed.
02 — PSU CURRENT SIGNATURE
Current draw is a boot clue, not a diagnosis by itself
Ranges below are practical diagnostic zones. Board design, battery state, supply voltage and boot path can shift actual values.
ANIMATED CURRENT TRACEIllustrative boot curve
03 — POWER SEQUENCE
Trace where boot progression stops
Click a stage to see the evidence expected before moving to the next one.
Select a stage
The selected power stage will show what must be present before blaming the next subsystem.
04 — VOLTAGE REFERENCE & RAIL SEQUENCE
Know which rail should exist — and when
These are practical Android bench reference ranges, not universal model specifications. Model-specific values should override generic references whenever available.
| Rail / Signal | Typical Expected | When Expected | Measured | Status | Technician Interpretation |
|---|---|---|---|---|---|
| VBAT / BAT+Battery / PSU input | ~3.6–4.45 V | Always with battery/PSU connected | — | Missing/low input invalidates downstream diagnosis. | |
| VPH_PWR / VSYSMain system rail | Near battery voltage | After input path / PMIC main path | — | VBAT present but VPH absent points upstream of CPU/storage. | |
| 1.8 V AON / I/OCommon logic rail | ~1.8 V | Early PMIC / SoC initialization | — | Common reference rail; exact rail name and timing are platform-specific. | |
| CPU / Core railDynamic SoC core | ~0.8–1.2 V class | After PON; often dynamic/pulsed | — | Do not use a fixed universal value; confirm rail ID and boot timing. | |
| eMMC VCCQI/O supply | ~1.8 V commonly | Storage initialization | — | Absent I/O rail can mimic dead storage / communication failure. | |
| eMMC VCCCore supply | ~2.8–3.3 V commonly | Storage initialization | — | Check enable, regulator, load and short before replacing eMMC. | |
| UFS VCCUFS core supply | ~2.5–2.9 V class | UFS power-up / link startup | — | Exact UFS generation/platform requirement must be verified. | |
| UFS VCCQ / VCCQ2I/O / M-PHY support rail | ~1.8 V class | UFS initialization | — | Some UFS designs use additional lower-voltage rails; use model profile. |
within generic range
outside generic range
not measured
05 — MASTER RAIL / GR DATABASE
Search the rail before judging the reading
Generic baselines are useful only as a first comparison. Exact model + board-revision known-good data should supersede these values.
0 rails
| Rail | Category | Operating Voltage | GR / Diode | Resistance-to-GND | Role | Bench Note |
|---|
Critical: low-voltage CPU/GPU/core rails can legitimately measure very low resistance.
Never classify a rail as shorted from a generic resistance number alone.
06 — GR / DIODE-TO-GROUND REFERENCE
Compare the board against a known-good reference
GR/diode values are strongly model-, rail-, meter- and polarity-dependent. AIFlasher should store them by exact model and test point instead of pretending one value fits every board.
Important: A diode-mode number such as 0.420 is a junction-drop style reading, not “420 Ω”.
Resistance-to-ground and diode-mode values must never be mixed.
GR COMPARATOR
Measured vs known-good
Enter a known-good value and the board measurement.
Possible hard short, but confirm whether the rail is naturally very low impedance and verify meter mode.
Possible excess loading / partial short. Isolate the rail and compare with schematic topology.
Static ground loading looks similar; this does not prove the rail functions dynamically during boot.
Possible open path, missing load, broken trace, connector issue, or simply different measurement polarity/topology.
07 — CLOCKS, RESET & LOGIC SIGNALS
Voltage alone cannot prove boot execution
Use an oscilloscope or logic analyzer where appropriate. Frequencies and amplitudes are platform- and board-specific.
LOW-POWER CLOCK
32.768 kHz RTC
- Typical
- 32.768 kHz class
- Tool
- Oscilloscope
- Meaning
- PMIC / low-power timing activity
Absence may matter on some boards, but do not universally equate missing RTC with a specific current signature.
REFERENCE CLOCK
26 / 38.4 MHz XO
- Typical
- 26 or 38.4 MHz class
- Tool
- High-bandwidth scope
- Meaning
- SoC reference clock activity
Probe loading can disturb oscillator circuits. Prefer a suitable high-impedance probe and verified test point.
BOOT HANDSHAKE
RESET / PS_HOLD
- Typical
- Logic-level transition
- Tool
- Scope / logic analyzer
- Meaning
- PMIC ↔ application-processor state
Signal names and polarity vary by platform. Use schematic names whenever available.
SERIAL BUS
I²C / SPMI activity
- Typical
- Digital bursts
- Tool
- Scope / logic analyzer
- Meaning
- PMIC / charger / peripheral communication
Static pull-up voltage is useful, but transaction activity is stronger evidence of communication.
08 — CONTROLLED THERMAL SHORT FINDING
Inject only after identifying the rail
Safe injection is rail-dependent. The website should never present one voltage as safe for every Android motherboard.
BENCH PSUCURRENT LIMITKNOWN RAILTHERMAL HOTSPOT
1Identify railUse schematic / boardview / rail topology.
2Confirm shortCompare GR/Ω against known-good.
3Set conservative voltageNever exceed the rail’s normal operating ceiling.
4Limit currentIncrease only enough to produce detectable heating.
09 — USB STATE INTELLIGENCE
USB enumeration tells you how far the SoC progressed
Enumeration is strong state evidence, but it does not by itself prove which component is faulty.
No USB
Confirm input power, PON, PMIC rails, SoC reset/clock and physical USB path.
Qualcomm EDL
BootROM/EDL path is alive. Investigate storage initialization, boot chain and loader access.
MediaTek BROM
BootROM communication is available. Preloader/storage/DRAM path may not have progressed.
MTK Preloader
Boot has progressed beyond raw BootROM. Investigate later initialization or firmware/storage state.
Fastboot
Bootloader is running. Hardware is much further along; inspect slot, AVB, images and later boot stages.
ADB
Android userspace has progressed substantially. A pure “dead board” diagnosis is no longer appropriate.
10 — FAULT BRANCHES
Use isolation to create evidence
Do not replace storage, PMIC or CPU only because one branch changes the current draw.
BOARDUFS/eMMC
×
Storage Isolation
- Record current and USB state with storage installed.
- Isolate/remove storage only when appropriate.
- Compare current profile and USB enumeration.
- Then verify storage rails/link/device health.
A new 9008/BROM state after storage isolation is evidence of a changed boot path, not automatic proof of a bad storage IC.
PSURAILHOT
Short-Circuit Branch
- Confirm resistance-to-ground and identify the affected rail.
- Use controlled current-limited injection only at a rail-safe voltage.
- Locate heat by thermal camera, IPA or freeze method.
- Determine whether the hot device is the fault or only the load.
Never inject an arbitrary voltage into an unknown rail. Rail maximum voltage and topology must be known first.
SoCRAMSTORAGE
Handshake / Boot Branch
- Verify reset and reference clock activity.
- Confirm RAM power/training evidence where accessible.
- Check storage power and bus/link activity.
- Correlate with USB state before escalating to BGA work.
Low current alone is insufficient evidence for CPU or RAM rework.
11 — PLATFORM-SPECIFIC BOOT PATH
Same symptom, different architecture
The interpretation changes depending on the SoC family and boot-loader chain.
QUALCOMMPONPMICPBLDDRUFS/eMMCXBL / ABL
MEDIATEKPMICBootROMPreloaderEMI / DRAMStorageLK / bootloader
UNISOCBootROMFDL entryMemory initStorageBootloader